Krukowski A., Kale I. Simulink/MatLAB-to-VHDL Route for Full-Custom/FPGA Rapid. Prototyping of DSP Algorithms

MatLAB DSP Conference (DSP’99), Tampere, Finland, 16-17 November 1999This paper presents the way of speeding up the route from the theoretical design with Simulink/MatLAB, via behavioral simulation in fixed-point arithmetic to the implementation on either FPGA or custom silicon. This has been achieved by porting the netlist of the Simulink system description into the VHDL. At the first instance, the Simulink-to-VHDL converter has been designed to use
structural VHDL code to describe system interconnections, allowing simple behavioral descriptions for basic blocks. The resulting VHDL code delivers bit-true result when compared to the equivalent fixed-point Simulink model simulations.
1. Introduction
2. Basics of VHDL
2.1. Effective Implementation via Simulink-to-VHDL Conversion Tool.
2.2. Basics of Simulink.
2.3. Structural Analysis of the Simulink Model Description.
2.4. Automated Conversion from Simulink to VHDL.
2.5. The Basics of the Polyphase IIR Half-Band Lowpass Filter Structure
2.6. The Simulink Simulation Set-up
3. Conclusions